ARM wrestles with dark silicon

MUCH ATTENTION has been focused on Intel's struggle to reduce the power drain of its x86 mobile processors to that of the ARM architecture that dominates the emerging new class of powerful handheld computing devices. Yet ARM has a reverse problem in that it needs to increase computing power to meet user expectations, while keeping battery drain and heat within the constraints imposed by small formats.

ARM chief technology officer Mike Muller warned last week that chip designers will have their work cut out over the next decade to avoid the problem of what he called "dark silicon" - an allusion to the dark unused optical fibre networks that got some infrastructure providers into trouble when the dot-com bubble burst.

Muller explained, in a webinar for developers, that if device power budgets are kept at present levels, and the transistor density on chips increases in line with Moore's Law, mobile system designers could find themselves with computing power they cannot afford to use, unless innovative ways are found to circumvent the problem.

He gave the example of a current-generation 45nm-scale chip, which would shrink to a quarter the size at 22nm in 2014, and a sixteenth at 11nm in 2020. The smaller chips would be more efficient, drawing the same power at 22nm even though the peak frequency increases by a factor of 1.6, and 40 per cent less at 11nm despite having 2.4 times the peak clock speed.

Alternatively you could pack into the chip, at its original size, four times the number of transistors, and thus the compute power, at 22nm scale and 16 times at 11nm. However if the chip can only draw the same electrical power as the original, you could use only 25 per cent of it at 22nm and 10 per cent at 11nm. So up to 90 per cent of the silicon would be "dark".

The figures serve nly to illustrate the size of the problem, because future chips are not simply going to be rescaled versions of existing ones. For one thing they are more likely to expand upwards rather than outwards, with system-on-a-chip packages stacked one above the other to resemble something more like a motherboard-on-a-chip. The different layers will be connected wirelessly to reduce power and ease manufacture. And transistors are themselves changing. ARM announced last October that a 45nm ARM 1176 test chip made using silicon-on-insulator (SoI) technology showed power savings of up to 40 percent over existing versions.

Muller said SoI, which reduces leakage current, will play a big part in reducing power consumption, and so will the use of high-density, energy efficient memory.

Power consumption varies with the square of the operating voltage, so reducing this to near or even below the threshold at which the transistor switches on can produce huge savings. However, this can introduce timing errors and reduces the tolerance of the chip to temperature changes, and variations in both the power supply and the characteristics of chips coming off the production line.

Chips are normally run at a lower clock speed and higher voltage than is necessary to provide a safety margin, which is extremely wasteful.

Both Intel and ARM have been developing self-tuning circuitry that will allow a chip to monitor its own operating characteristics and optimise its parameters on the fly. Muller says ARM's version, called Razor, is now "deployable".

Razor adjusts the operating voltage and clock rate for 'near-zero' errors, and invokes a recovery mechanism when they do occur. It responds on the fly to transient spikes as well as slower variations such as temperature and ageing.

Muller was cautious on the subject of multi-core processing . "Never believe a multiprocessing story from a hardware guy. If he says, 'Here is great hardware and it is merely up to up to the software guys to exploit it', I would advise you to walk on by."

The multi-processors problem had been solved on the hardware side and was essentially a software problem, he said. Again, Intel has made similar noises.

Power consumption is of course a system-level problem. Screens in particular draw a lot of current and battery life is likely to get longer, though not dramatically so.

Muller pointed out that much power is drawn by motors of one kind or another, in fans and disk drives, and that the same can be said of the world's electrical-power budget in which machines account for more than 50 per cent of consumption.

He reckoned that smart power control of the kind used in chips could cut by between 25 per cent and 40 per cent the consumption of the 300 million motors used in industry.

Muller made no direct comparison between the problems of dark silicon and dark fibre. A major difference is that the dark fibre problem was economic, not technical - data traffic charges plummeted, leaving some investors in trouble. The Internet can hardly have too much capacity, but how powerful will future mobile devices need to be?

Muller envisaged a world a decade hence with pervasively-connected mobiles packing the processing power of today's servers. Yet as these would essentially be acting as front ends for environments, services and applications running in the Cloud, it was not clear what he expected this untethered power to be used for.

The issue is particularly pertinent to ARM which has built its business tailoring a range of chip designs that can be precisely fitted to the needs of particular tasks.

Doubtless uses will be found for the extra handheld power. My guess is that some will be needed to process advanced input systems, a big drawback of current designs.

Not the least interesting aspect of Muller's talk is that it shows the competition with Intel is not simply a case, as so often depicted, of the US giant trying to encroach on ARM's mobile stronghold. ARM is not shrinking from taking Intel on in its own home territory of powerful general-purpose processors. µ