another thorough read now possibly reveals it not two processes SOI/SiON (LPT) or High-K (HP)... its...

SOI/SiON DualGate-LPT
quick, cheap chemical vapor deposition (CVD) process
SiON process with a 90% yield may compare with an estimated 70% yield for a high-k/metal gate

SOI/SiON TripleGate-HP
same as above with third gate/transistor to increase performance than High-K.

High-K
low leakage, high performance
high capacitance, requires high active power
thiner but expensive EOT
slow, expensive atomic layer deposition (ALD)
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“Our 28 nm high-k/metal gate is not at a very mature stage now,” Wei said. “Our plan is that by the second half of 2009, the technology will reach its maturity stage. Some customers cannot wait; they want to do it early, so we try to accommodate their needs.”

meaning the customer is fujitsu pushing TSMC as xbitlabs.com article suggests. because Tukwila-ITANIUM is already too much delayed.

Also this could fuel war of not just nano-meter but also sub process. So After GHz war, then nm war, it will be SOI/SiON (LPT) or High-K (HP) war. Could it be thought that AMDs improving 45nm yields (Steppings) were movement from SOI/SiON to high-k !?!

This could also mean AMD will stop preaching its glorious SOI. High-K is the way or atleast the better one of two 32/28nm fab processes or start with crapy steppings (LPT) of 28/32nm and move to performance steppings (HP) as AMD most visibly does or we can say when AMD enshowers 32nm blessings upon thy self, thee shalt asketh... behold is it crapth SOI 32nm !?!

poly oxide gate=SOI/SiON (LPT)
Quotes from prev post URLs
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“With a poly oxide gate, they have to jack the voltage up to get the same performance, and that makes the leakage that much worse.”

"TSMC positions its low-power 28 nm offering as lower cost than the IBM high-k offering. IBM’s analysis is that while the gate-first high-k process adds one mask, by not using stressors IBM has a net reduction of three masks"

Taiwan Semiconductor Manufacturing Co. Ltd. (TSMC, Hsinchu, Taiwan) said it will offer both silicon oxynitride (SiON) and high-k/metal gate solutions at the 28 nm node, with early multi-wafer shuttles starting late this year in time for volume manufacturing beginning early in 2010.

The 28LPT (low-power turbo) process, based on oxynitrides, will enter early manufacturing in the first quarter of 2010, and the 28HP (high-performance) process, with a high-k/metal gate stack, will be ready in the first half of 2010.

http://www.semiconductor.net/article/200711-IBM_Alliance_Ready_With_28_nm_Eval_Kits.php

http://www.semiconductor.net/article/203006-Citing_High_k_Costs_TSMC_Plans_Dual_Track_28_nm_Solutions_in_2010.php

fujitsu is i guess is pushing TSMC for...
http://www.xbitlabs.com/news/cpu/display/20090515100227_Fujitsu_Discloses_Further_Details_About_Venus_Chip_Eight_Core_Processor_that_Consumes_35W.html
because of ...
http://en.wikipedia.org/wiki/SPARC_Enterprise#Processor
and ...
http://en.wikipedia.org/wiki/Itanium#Future_processors