"Thanks Phil, yes I meant Simultaneous (not Symmetric) but the automatic acronym expansion engine got it wrong. Anyway, I'd love IBM to have an option to disable SMT for HPC jobs anyway."

This is possible. There is a command in AIX called smtctl to do it. It has been there since power5.

It's a good point but I don't think there are many systems out there that have 100GBps memory bandwidth to a single processor. 100Gbps is actually provided by dual channel RAM at 800MHz, so, I would expect the quad channel arrangement with DDR3 to give at least 270Gbps (1066MHz), if not more like 333Gbps (1333MHz).

"Moving on after the Power(Mac)6"
Power6 has nothing to do with Mac. At one point the G5 CPU was a cut-down, simplified version of a Power4 but that was a LONG time ago.

"Note the branding change from Power6 to POWER7 (all caps)."
It's always been POWER (it's an acronym). If you Google presentations on the earlier chips you'll clearly see POWER4, POWER5, POWER6, etc. People simply don't like writing in all caps so you usually see it written as Power.

I am curious about the "100 GBps". Is that suppose to be 100 Gbit/s or 100 GB/s? I have seen so much shit here like Kbps, mbps and all that nonsense. Quite frankly, I cannot believe anything you write. Have you ever tried to find a job as janitor?

I heard rumors a few years back that said IBM was going to use the Opteron Socket "of the future."

Maybe they will share G34.

You know, you're right, this processor fits the specs for a DDR3 Magny-Cours socket.

Mangy-Cours is 2x dual DDR2 and 360Gbps inter-socket connect, isn't that HTT 3.1? Although I thought that theoretical max throughput was north of 50GB/s which is over 360Gbps; 400Gbps or greater actually.

Why wouldn't IBM take an advantage from the alliance with AMD if they really want to make their way into x86 systems. You've done that with Roadrunner (Opteron+Cell Broadband) then why not Opteron+POWER7? I know it would be hard to do so but hey, you're IBM! You mentioned about making chip from virus or whatever. If you can do that, by using Torrenza platform, this should be easy for you.

IBM is clean on holding to their three-year plans. Nothing got rushed here. That it is a densely-cored, densely-threaded, throttled-back GHz machine wasn't completely clear until a few months ago. The three year plan did say something about socket-sharing with AMD and possibly Mainframe-instruction-set capability. Whoever gets more on this, I am interested!

I wonder what kind of heat output this thing generates, does it need water cooling? When will IBM step back into making x86 chips? I want to see a Core ibm7 Blue Lightning lol

Thanks Phil, yes I meant Simultaneous (not Symmetric) but the automatic acronym expansion engine got it wrong. Anyway, I'd love IBM to have an option to disable SMT for HPC jobs anyway.

Its nice stuff above, about kantner, if you look closely, hasn't posted anything in year, obviouly another Mike'd Out. Use to post in MAD AMD MAME.MD log, 2.

However, sure ibm be super, yet BULLDOZER Is Rumour'd to have 4 Channels of DDR3 1333. Thats Lots better & 12 cores 2x6., when finds home, where Buffaloe rhoame, ^.+.^ deer/Antleope Play, inside MAGNY Core. Its rumour from Last Day of HOT CHIPS 21. N.B.

NOTE: Please do NOT discuss the Shattered Horizon Beta outside of these forums, thanks!
Especially after Your System Shatters.

From 200 to 400 took 10 years to 500 another 10 then 15 years to 6 now 7. Ole Lucky 7. Yet Beta of 11 is being developed. it delivers A&W Root Beer Floats , Calif Burger RAW onion & TOMATOE with Potato Crinkle Fries & thousand island dressing.

DRASHEK

SMT stands for 'Simultaneous Multi-Threading'
- not 'Symmetric'

(because that describes what it is quite well)