git a spanner tool to pry the zip stuck to me crotchtop afore a kerfuffle erupts.
Great girters and sweet fardel nook! These are the days of marrow dangling, passing the splod, sardine racing, conger cuddling, rhubarb thrashing, and dwile flonking. Now you lappys'll have me flogging crotchtops? I blame mad mike magee!
...that these new memory modules will be inherently faster than prior portable implementations. It's the connector. The old edgecard connectors are the single worst signal integrity barrier in the entire (a) Intel bridge chip-to-memory and (b) AMD processor-to-memory data path. The Qimonda folks are bright thinkers. I cannot imagine that they would develop a new module interconnect and make it less functional than the old style. (In fact, it would be a challenge to design a smaller interconnect having worse S.I. characteristics.)

- The Garret
git a spanner tool to pry the zip stuck to me crotchtop afore a kerfuffle erupts.
Great girters and sweet fardel nook! These are the days of marrow dangling, passing the splod, sardine racing, conger cuddling, rhubarb thrashing, and dwile flonking. Now you lappys'll have me flogging crotchtops? I blame mad mike magee!
I believe the term Micro DIMM has been used for sometime.
...that these new memory modules will be inherently faster than prior portable implementations. It's the connector. The old edgecard connectors are the single worst signal integrity barrier in the entire (a) Intel bridge chip-to-memory and (b) AMD processor-to-memory data path. The Qimonda folks are bright thinkers. I cannot imagine that they would develop a new module interconnect and make it less functional than the old style. (In fact, it would be a challenge to design a smaller interconnect having worse S.I. characteristics.)

- The Garret