I think its all about the money.

Just some freaky Intel rumor, to help ram vendors to sell their new Tri channel kits. 

Because the fact is that tri channel performance is just crap and yield almost zero increase compared to dual channel operation on the X58. 

All bandwith increase is due to the decreased latency caused by the integrated memory controler.

Yo viscountalpha,
OCing used to yield up to 50% performance improvements (15 years ago). It became a common hobby for many people. You shouldn't knock it as this stuff encourages the manufactures to improve their chips to go faster, be more stable and run cooler. Not to mention it's a hobby that doesn't kill people or hurt the economy :P

I paid 500usd for my set of DDR3 for my Intel setup. It runs at 1.9v for 2Ghz.


This is BS and a step down Intel. Take that crap memory controller back off the CPU.

This is really interesting. Looks like Intel uses some first generation integrated memory controller. AMD has e.g. independend power plane for the memory circuit so they will have no problem with that. But Intel should have also or not? Or is this related to maximums of their process? If so then this is a problem which can't be fixed by Intel at any time in the future! Combined with the fact that Nehalem will only support DDR3 this will become a big problem.

For someone who doesn't like to overclock and force their hardware to go faster then it should, this news is a godsend.

Seriously, screw all of you overclockers with your 3dmark stupid benchmarks and thinking your e-penis is so big just because you can squeeze a few more megahertz out of the FSB and CPU.

The way the nehalem is setup, OC'ing will be significantly harder. Someone claimed test points will be needed with nehalem. I can believe this.

http://forums.nehalemnews.com/topic/116271/1/


Is the first comment randomly generated spam? Or just written by a retard? I can't make up my mind.

the cpu and memory V are linked thats why it will fry your cpu @ 1.65 volts or 1.7 for the risky people.

It's possible that the memory controller is linked to the cpu's voltage in some way affecting memory.If things change with a stepping is an inherent problem of the cpu, if not then probably there is a problem with the design of the motherboards.You can overvolt ram in AMD 64's but to reach very high voltages you must increase the cpu's voltage too.In order to understand the problem we must look into the specs and "identify" the voltage lines' behaviour.

After all, given the AMD experience they've managed to avoid some of the problems with the integrated memory controller.

But it's fun though, because from my knowledge it means that almost any DDR3 memory currently on the market should be able "to burn" the mighty perfect-designed i7 core Intel.

Smoken!!!

Somewhat in Distant future, yet already affectin long commentos, is War Intel is Cooking Up.

Microsoft Anit' So Happy, Turning into Mafioso ShoGun, whos: Got Technology, Event. That being Larrabee.

Larrabee, as cut commentos yesterday NOT spoked, has its White Paper out from Intel yesterday. Big Probs for Microsoft. Larrabee has Two Way Cross Bar Cache. That item which Cut Barcelonia To Ribbions. 1Dit, Dit...2Dot,Dot,1Dit,Dit,2Dot,Dot,1Dit....All? that would ?fit such complexity, really slowing down hampster wheel.

Microsoft has Pushed Multi Core Since Hypertransport & multi Processor mains. Yet to this day, Multi Core is Back AlleyWay Dream. Free Money?.More like Free Balonia.

Things running so fast & complex need very narrow parameters to work within & article is good proof. Take that narrowness & add backslaps that might activate long term routing that dosn't & its mess. At least it seems so now. Microsoft brought it on & has NO solution. Soon hardware will be much more perky, yet trying to run type of software that hasn't been engineered correctly, Good Luck, 7. 
Get With it, Microsoft. Two Way Caches are Future, NOT to be Ignored. Try that on your lousy assed parameters & just about anything should work, once two way multi core works.
STeWie Drashek