Exactly where are the bandwidth issues? All of the cards have the SLI bridge connector and the majority of the information in the rendering is transmitted over that connector to preserve bandwidth on the main bus. In actuality, it's only really important that the: Host card, main card, top card, first card...whatever you want to call it, in on the pci-e v2 slot for the bandwidth. Everything else is divided amongst the cards though the connector. Even though the third card probably doesn't boost performance that much at all due to other bottlenecks , the fact that the 3-way sli is a foundation for physics processing over GPU. (2 graphics in sli, and 1 physics)...and even then, they would match the pci-e v2 card with the pci-e v1 card in sli so the physics card can get the pci v2 connection otherwise wasted by the second graphics rendering card. Check it all out, a little research goes a long way, just be sure to check the refferences.

I’d like to see all the PCIe lanes cabled to a ‘daughter’ board. That way you’d have potentially as much space as you could possibly want, as many slots of whatever size you could possibly use, and you could dial-in the bandwidth/lanes with any extra bandwidth that would otherwise be hardwired and wasted on the mobo used to connect more slots/cards. 

I think this article is fair, and I’m not sure Mike Magee has a coherent community of writer’s here.

Live responsibly and please don't drink and breathe.

First, PCIe 16X can be exhausted, but it's in a rare case, and the impact is limited, so saying it has no effect makes no sense until you try it. This could very well cause a hiccup in such a fragile situation (no more/less fragile than Quad-fire). 

Second, the article does state a 4 point jump from card to card, and in reality it won't matter since the main issue of inter card communication is along the bridges, so the main use of the PEG slots will be for host-vpu communication not VPU-VPU.

Also ALL THREE slots are connected to the SPP none are connected to the MCP, so I think it would be 3 hops not 4 and if the NF200 is running at twice the speed then it would equate to 2 hops at twice the speed and one hop at PCIe 1.1 speed meaning close to parity each way, similar to current SLi. Still not as good as 3 PCIe2.0 slots on the same path, but probably good enough.

As for the Green versus kind Green Kinda Red team debates, if anything the InQ has become more nV complimentary since Fuad left, but maybe that's just the perception since right now nV is in a slight lead for the sales/performace/etc, and the AMD team are a little down at the moment. 

Things could change, both in the graphics arena and the article perception here, It's all in the eye of the beer holder I guess.

As one can see, 3SLI wasn´t on Nvidia plans, or all 3 PCIe would be 2.0 from start. It´s just a PR release to counter CrossFire X announcement. Not that this would really matter, as most people hardly use 2 cards SLI or Crossfire. Let alone buy 3 to 4 cards.
And about "Inquirer grudge", picking on everyone who give a reason to is what The Inq is all about. And I hope it continues just like that. Nvidia got some today? Tomorow will be AMD, Intel, MS and so on. I don´t see anybody being protected here. Nothing has only good sides. 
3SLI doesn´t work? Fine, 8800 line trashes AMD 38x0 performance in almost all games in 1 or 2 GPU configuration, which today is 100% of the market and will be 99% when 3/4 GPUs come out someday.
It´s even funny when some cry-baby come and say "stop blaspheming my dear brand" and the sort. Grow up! Nobody gets nothing by being blindly faithful to a company! Not even the employees.
And If you don´t like the reading, you can just go somewhere else, that´s what freedom is all about.

PCIe 2.0 does show gains with a simple benchmark run. Not rampant repeating of other's rumors. Get a 2.0 board, a 2.0 card, and a 1.0 card of the same type. Run them, eat words typed. Bob Dole...listening?

I see the bridge as getting around this functionally. The board paths are moot just as much as they matter in past SLI configs. Data shouldn't go over the motherboard, just commands to...the mastercard? Not sure.

Have to agree with JR - If they can't get SLI working properly on 2 cards how the heck they gunna manage it with 3?

Gave up a long time ago on SLI - its pointless same as crossfire when 2-3 months later one card comes out to pee on both of em.

nvidia can not get sli to work that good let alone my 7950 gx2 with quad sli now they are going to try this gimmick give me a break. nvidia needs to fix the crap that they have that does not work properly now.

There has been a history of violence between inquirer and nVidia. Apparently whatever inquirer writes about the green team is either targeted so take some sort of a revenge or manipulated to suit the competitors.

Actually, if you had a clue, you'd know that data is transferred over PCI-e between GPUs and the CPU, regardless of the internal bridge for GPU-to-GPU communication, so PCI-e latency is a problem as the article suggests. Also texture fetches from system RAM take place over PCI-e.

I'd really like to see some benchmarks comparing 2sli and 3sli. I'm pretty sure it will show that 3sli gives little to no improvement, and maybe even a slowdown.

I have 2 8800GTX's in SLI on a 680i striker extreme with 2GB of 1111mhz ddr2 and a 6800extreme dual-core (i.e. a top-end system in all key parts).

All the benchmarks and games I've ever run show that even if I overclock my CPU and FSB hard, still the performance bottleneck is not the graphics system, so I'm betting going 3-way SLI will bring little or nothing to the party.

Right now, there are no video cards will take advatage of PCIe2. No card right now takes full advantage of PCIe 16x. So... the... problem is... where? If you have any other questions, read the other posts.

2 PCIe 2.0 and 1 PCIe 1.0? and both PCIe 2.0 linked to the NB and the third to SB?, how dumb is that...i had high hopes for 3SLI, now, they are gone...

To make matters worse:
i've read somewhere that the Nforce 200 bridge chip is connected to the northbridge through PCIE gen1.
This thing is just a gimmick to get PCIE gen2 spec on paper and nothing more.

Who cares about pcie latency, when 3 sli has a 3 bridge? this is an issue, when there is not enough memory onboard and textures are cached in main memory. But 3 sli is for top of the top cards, so this is not the case. Please think before writing b$.