Intel, AMD, Nvidia, Sun sued
And Raza, Real
A FIRM HAS SUED AMD, Nvidia, Intel, Sun, Raza Microelectronics and Real Networks, alleging they breach a patent it owns.
The patent in question is 6,629,163 with the inspiring name of “Methods and System for Demultiplexing a First Sequence of Packet Components to Identify Specific Components Wherein Subsequent Components are Processed without Re-identifying Components.”
That’s a lot of components.
Implicit Networks alleges Intel uses this patent in its Viiv technology, AMD and Raza use it in ATI and Alechemy products, Nvidia uses it in its Stant Media software, Sun uses it in its Java Media Framework, while Real uses it in its Helix DNA client.
Implicit wants money. µ
Comments
ah come on ... WTF is this
All your words are belong to us.This is very reminiscent of Intel trying to copyright the lower case letter i. Why doesn't some make a patent for every freaking technical word out there an sue everyone.... there is a serious problem with the copyright system when they allow such shenanigans as this.
Alechemy....
Transmuting Bud into an IPA would be a wonderful talent.Header file anyone?
This is basically a patent for reading the header information of a binary stream so you can work out where in the file information is. ISn't this been used on every graphics file format for years???How exactly did they get a patent for this??
And Novell owns their network protocols.
I'm guessing:It relies on file format/layout, instruction codes (if you will), but basically it works like a message packet protocol macro/script API.
6,629,163 is not listed on wikipatents.
A search for the name yielded this on wikipatents (I can see where this would be applicable to rendering video and possibly streaming DRM issues.):
A new class of packet-switched extended generalized-shuffle self-routing multistage interconnection networks provides a continuous performance-cost tradeoff between, on the one hand, the knockout switch or buffered crossbar and, on the other hand, the tandem banyan network. Multiple copies of the new networks may be serially cascaded back-to-back, and connected in parallel. A particular concentrator circuit in the network concentrates active communications packets randomly distributed on many lines onto selected lines. Another, second, network communicates synchronization information communicable point-to-point and multipoint while performing arithmetic and logical operations on the synchronization information so communicated. A hybrid parallel combination of both the first and second networks serves to efficiently communicate information point-to-point while simultaneously communicating synchronization information both point-to-point and multipoint.
is this the PCI bus? If so let's scrap it and use SATA IIa.